用于简化线性度测试的SAR ADC BIST

2011 IEEE International SOC Conference Pub Date : 2011-11-21 DOI:10.1109/SOCC.2011.6085122

An-Sheng Chao, Soon-Jyh Chang, Hsin-Wen Ting

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引用次数: 1

摘要

提出了一种快速估计微分非线性(DNL)的内置自检(BIST)方案。该方案可以检测严重的代码偏差，减少所需的样本。与传统的码密度测试相比，该方案可将10位近似寄存器模数转换器(SAR ADC)的采样数减少97%。

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A SAR ADC BIST for simplified linearity test

A built-in self-test (BIST) scheme to quickly estimate differential nonlinearity (DNL) is proposed. The proposed scheme detects serious code deviation and reduces needed samples. Compared with the conventional code density test, the scheme reduces 97% sample count for a 10-bit approximation register analog-to-digital converters (SAR ADC).

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来源期刊

2011 IEEE International SOC Conference

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