{"title":"液体冷却多芯片模块倒装芯片的热与力学分析","authors":"R. Narayanan, P. Hall, R. Chanchani","doi":"10.1109/ECTC.1993.346856","DOIUrl":null,"url":null,"abstract":"In this paper, thermal analysis of a three dimensional quarter model of a 156 pad flip-chip on a liquid cooled multichip module with 75 other chips is simulated using COSMOS-finite element software. Both flip-chip (pad grid array type) and TAB type of interconnections are used for the module. The total power on the board is 134 watts, the flip-chips generating up to 1.5 watts each and the one TAB type generating 12 watts. Each chip can be modeled independently due to the absence of cross-heating by its neighbors. Forced convection liquid cooling using an organic coolant with various flow rates and thus various convection coefficients is used for the study. The temperature rise in the boundary layer of the coolant was 8/spl deg/F at the coolant flow rate of 0.073 gallons per minute for the flip-chip with 1.5 watts. The maximum thermal strains calculated were found to be 0.37% (if the temperature of zero strain is assumed to be 0/spl deg/F, and Young's modulus of solder is 2 Mpsi). The maximum shears were found in the corner bump, and they differed from the next bump by 20%. Polyimide layers above and below the solder bumps were found to contribute about 80% of the thermal resistance. These results are used in a Coffin-Manson analysis to predict adequate life (cycles) for the high lead solder bumps (95%Pb-5%Sn).<<ETX>>","PeriodicalId":281423,"journal":{"name":"Proceedings of IEEE 43rd Electronic Components and Technology Conference (ECTC '93)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Thermal and mechanical analysis of flip-chips on a liquid-cooled multichip module\",\"authors\":\"R. Narayanan, P. Hall, R. Chanchani\",\"doi\":\"10.1109/ECTC.1993.346856\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, thermal analysis of a three dimensional quarter model of a 156 pad flip-chip on a liquid cooled multichip module with 75 other chips is simulated using COSMOS-finite element software. Both flip-chip (pad grid array type) and TAB type of interconnections are used for the module. The total power on the board is 134 watts, the flip-chips generating up to 1.5 watts each and the one TAB type generating 12 watts. Each chip can be modeled independently due to the absence of cross-heating by its neighbors. Forced convection liquid cooling using an organic coolant with various flow rates and thus various convection coefficients is used for the study. The temperature rise in the boundary layer of the coolant was 8/spl deg/F at the coolant flow rate of 0.073 gallons per minute for the flip-chip with 1.5 watts. The maximum thermal strains calculated were found to be 0.37% (if the temperature of zero strain is assumed to be 0/spl deg/F, and Young's modulus of solder is 2 Mpsi). The maximum shears were found in the corner bump, and they differed from the next bump by 20%. Polyimide layers above and below the solder bumps were found to contribute about 80% of the thermal resistance. These results are used in a Coffin-Manson analysis to predict adequate life (cycles) for the high lead solder bumps (95%Pb-5%Sn).<<ETX>>\",\"PeriodicalId\":281423,\"journal\":{\"name\":\"Proceedings of IEEE 43rd Electronic Components and Technology Conference (ECTC '93)\",\"volume\":\"17 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1993-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of IEEE 43rd Electronic Components and Technology Conference (ECTC '93)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECTC.1993.346856\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of IEEE 43rd Electronic Components and Technology Conference (ECTC '93)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.1993.346856","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Thermal and mechanical analysis of flip-chips on a liquid-cooled multichip module
In this paper, thermal analysis of a three dimensional quarter model of a 156 pad flip-chip on a liquid cooled multichip module with 75 other chips is simulated using COSMOS-finite element software. Both flip-chip (pad grid array type) and TAB type of interconnections are used for the module. The total power on the board is 134 watts, the flip-chips generating up to 1.5 watts each and the one TAB type generating 12 watts. Each chip can be modeled independently due to the absence of cross-heating by its neighbors. Forced convection liquid cooling using an organic coolant with various flow rates and thus various convection coefficients is used for the study. The temperature rise in the boundary layer of the coolant was 8/spl deg/F at the coolant flow rate of 0.073 gallons per minute for the flip-chip with 1.5 watts. The maximum thermal strains calculated were found to be 0.37% (if the temperature of zero strain is assumed to be 0/spl deg/F, and Young's modulus of solder is 2 Mpsi). The maximum shears were found in the corner bump, and they differed from the next bump by 20%. Polyimide layers above and below the solder bumps were found to contribute about 80% of the thermal resistance. These results are used in a Coffin-Manson analysis to predict adequate life (cycles) for the high lead solder bumps (95%Pb-5%Sn).<>