Hump-effect impact on subthreshold VLSI circuit

This paper presents a comparative study of VLSI circuits operated in subthreshold and the impact of matching and hump-effect in a mature 180nm process. Measurement at device level is first presented. Then two circuits have been used to compare such as current reference, and SRAM, ROM are ultimately limited by noise level and mismatch. In this work, CORNER DOPED devices have been fabricated, measured, and finally compared with standard CMOS technology of the same area and a particular emphasis on weak inversion region. The proposed device shows improved gate voltage mismatch in weak inversion with respect to standard CMOS.