三维堆叠集成电路中可靠信号与电源互连的协同设计

2009 IEEE International Interconnect Technology Conference Pub Date : 2009-06-01 DOI:10.1109/IITC.2009.5090339

Young-Joon Lee, Michael B. Healy, S. Lim

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引用次数: 10

摘要

随着芯片堆叠技术和通硅孔制造技术的快速发展，3D集成电路时代即将来临。然而，三维集成电路设计技术的知识基础仍然不够成熟。在本文中，我们研究了在三维集成电路中信号和电源互连的系统级集成过程中出现的设计问题。分析了路由拥塞和功率噪声，确定了影响性能和可靠性指标的各种因素。

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Co-design of reliable signal and power interconnects in 3D stacked ICs

With the rapid advance of die stacking and through-silicon-via fabrication technologies, the era of 3D ICs is near. Yet, the knowledge base of 3D IC design techniques is still not matured enough. In this paper, we investigate the design issues raised during the system-level integration of signal and power interconnects in 3D ICs. Routing congestion and power noise are analyzed, and various factors that affect performance and reliability metrics are identified.

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2009 IEEE International Interconnect Technology Conference

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