{"title":"部分扫描设计中扫描触发器的确定","authors":"Dong-Ho Lee, S. Reddy","doi":"10.1109/ICCAD.1990.129914","DOIUrl":null,"url":null,"abstract":"A report is presented on procedures investigated to determine flip-flops to be scanned in partial-scan designs for sequential circuits. The main idea pursued is to derive a minimal feedback vertex set of the so-called S-graphs. Results of applying optimal and heuristic procedures on a set of benchmark circuits indicate that heuristic methods give fast and near minimal solutions.<<ETX>>","PeriodicalId":242666,"journal":{"name":"1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers","volume":"98 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"220","resultStr":"{\"title\":\"On determining scan flip-flops in partial-scan designs\",\"authors\":\"Dong-Ho Lee, S. Reddy\",\"doi\":\"10.1109/ICCAD.1990.129914\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A report is presented on procedures investigated to determine flip-flops to be scanned in partial-scan designs for sequential circuits. The main idea pursued is to derive a minimal feedback vertex set of the so-called S-graphs. Results of applying optimal and heuristic procedures on a set of benchmark circuits indicate that heuristic methods give fast and near minimal solutions.<<ETX>>\",\"PeriodicalId\":242666,\"journal\":{\"name\":\"1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers\",\"volume\":\"98 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-11-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"220\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCAD.1990.129914\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCAD.1990.129914","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
On determining scan flip-flops in partial-scan designs
A report is presented on procedures investigated to determine flip-flops to be scanned in partial-scan designs for sequential circuits. The main idea pursued is to derive a minimal feedback vertex set of the so-called S-graphs. Results of applying optimal and heuristic procedures on a set of benchmark circuits indicate that heuristic methods give fast and near minimal solutions.<>