{"title":"150μ w三阶巴特沃斯无源开关电容滤波器,92 dB SFDR","authors":"Zeynep Lulec, D. Johns, A. Liscidini","doi":"10.23919/VLSIC.2017.8008462","DOIUrl":null,"url":null,"abstract":"For the first time, complex conjugate poles are integrated on silicon by using only switches and capacitors. A general design methodology is proposed to implement low-pass transfer functions with sharper frequency profile compared to the passive-switched-capacitor topologies present in the literature. Theory and simulation results are validated through the measurements of a 0.13μm prototype filter. The 3rd-order filter has a cut-off frequency of 540 kHz, an integrated input referred noise of 17μV and out-of-band IIP3 of 55dBm, while consuming 150μW in the phase clock generator.","PeriodicalId":176340,"journal":{"name":"2017 Symposium on VLSI Circuits","volume":"37 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-06-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"A 150-μW 3rd-order butterworth passive-switched-capacitor filter with 92 dB SFDR\",\"authors\":\"Zeynep Lulec, D. Johns, A. Liscidini\",\"doi\":\"10.23919/VLSIC.2017.8008462\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"For the first time, complex conjugate poles are integrated on silicon by using only switches and capacitors. A general design methodology is proposed to implement low-pass transfer functions with sharper frequency profile compared to the passive-switched-capacitor topologies present in the literature. Theory and simulation results are validated through the measurements of a 0.13μm prototype filter. The 3rd-order filter has a cut-off frequency of 540 kHz, an integrated input referred noise of 17μV and out-of-band IIP3 of 55dBm, while consuming 150μW in the phase clock generator.\",\"PeriodicalId\":176340,\"journal\":{\"name\":\"2017 Symposium on VLSI Circuits\",\"volume\":\"37 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-06-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 Symposium on VLSI Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/VLSIC.2017.8008462\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 Symposium on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/VLSIC.2017.8008462","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 150-μW 3rd-order butterworth passive-switched-capacitor filter with 92 dB SFDR
For the first time, complex conjugate poles are integrated on silicon by using only switches and capacitors. A general design methodology is proposed to implement low-pass transfer functions with sharper frequency profile compared to the passive-switched-capacitor topologies present in the literature. Theory and simulation results are validated through the measurements of a 0.13μm prototype filter. The 3rd-order filter has a cut-off frequency of 540 kHz, an integrated input referred noise of 17μV and out-of-band IIP3 of 55dBm, while consuming 150μW in the phase clock generator.