基于线性回归的RISC-V处理器嵌入式软件早期性能评估

Weiyan Zhang, Mehran Goli, R. Drechsler
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引用次数: 3

摘要

近年来,基于risc - v的嵌入式系统越来越受欢迎。在设计过程的早期阶段对嵌入式软件进行性能评估对于有效地探索设计空间和减少上市时间限制起着重要的作用。虽然已经提出了几种不同抽象层次的周期精确RISC-V模拟器,但无论是开发仿真设置,还是通过仿真获得周期数方面的软件性能,它们都具有固有的高成本。这给设计师带来了很大的负担,他们需要进行设计空间探索。在本文中,我们提出了一种新颖的基于ml的方法,使设计人员能够在设计过程的早期阶段快速准确地估计在RISC-V处理器上实现的给定嵌入式软件的性能。使用一组标准基准,对实际周期精确的RISC-V虚拟样机(VP)进行了评估。我们的实验表明,我们的方法可以在短的执行时间内获得高精度的性能估计结果。与周期精度RISC-V VP模型相比,该方法的仿真速度提高了5倍以上,平均预测误差小于2.5%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Early Performance Estimation of Embedded Software on RISC-V Processor using Linear Regression
RISC-V-based embedded systems are becoming more and more popular in recent years. Performance estimation of embedded software at an early stage of the design process plays an important role in efficient design space exploration and reducing time-to-market constraints. Although several cycle-accurate RISC-V simulators at different levels of abstraction have been proposed, they have an inherently high cost, both for the development of the simulation setting and for obtaining the software performance in terms of the number of cycles through simulation. This results in a significant burden on designers to perform design space exploration.In this paper, we present a novel ML-based approach, enabling designers to fast and accurately estimate the performance of a given embedded software implemented on the RISC-V processor at the early stage of the design process. The proposed approach is evaluated against a real-world cycle-accurate RISC-V Virtual Prototype (VP) using a set of standard benchmarks. Our experiments demonstrate that our approach allows obtaining highly-accurate performance estimation results in a short execution time. In comparison to the cycle-accurate RISC-V VP model, the proposed approach achieves up to more than 5 x faster simulation speed and less than 2.5% prediction error on average.
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