通过使用专门的漏洞分析方法提高模拟ip的安全级别

Noemie Beringuier-Boher, D. Hély, V. Beroulle, J. Damiens, P. Candelier
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引用次数: 8

摘要

随着智能手机和机顶盒等多用途系统的日益普及,在soc和asic概念中,安全要求变得与功耗和硅面积限制一样重要。同时,ip的复杂性和新技术节点的出现也增加了安全评估的难度。事实上,预测电路在超出其规格限制时的表现现在是一项更难的任务。虽然软件开发和数字硬件设计中的安全问题是众所周知的,但模拟硬件的安全问题并没有得到真正的研究。本文首先介绍了模拟电路和混合电路的安全问题,然后提出了一种针对模拟电路和混合电路的漏洞分析方法。利用该方法,通过客观评估AMS SoC和Analog IP的漏洞,并在设计的早期阶段选择适当的对策,提高了AMS SoC和Analog IP的安全水平。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Increasing the security level of analog IPs by using a dedicated vulnerability analysis methodology
With the increasing diffusion of multi-purpose systems such as smart phones and set-top boxes, security requirements are becoming as important as power consumption and silicon area constraints in SoCs and ASICs conception. In the same time, the complexity of IPs and the new technology nodes make the security evaluation more difficult. Indeed, predicting how a circuit behaves when pushed beyond its specifications limits is now a harder task. While security concerns in software development and digital hardware design are very well known, analog hardware security issues are not really studied. This paper first introduces the security concerns for analog and mixed circuits and then presents a vulnerability analysis methodology dedicated to them. Using this methodology, the security level of AMS SoC and Analog IP is increased by evaluating objectively its vulnerabilities and selecting appropriated countermeasure in the earliest design steps.
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