{"title":"hades高级建筑开发探索系统","authors":"P. Poechmueller, M. Held, N. Wehn, M. Glesner","doi":"10.1109/GLSV.1991.143995","DOIUrl":null,"url":null,"abstract":"The authors propose a new approach to high level behavioural synthesis starting from an algorithmic description in Hardware C. The algorithm is compiled into a corresponding data/control flow graph including several optimizations. The behavioural synthesis part of the system performs transformations like loop unrolling, parallelization, etc., whereby the user is supported through a feedback loop. For final structural synthesis an advanced tool based on genetic algorithms is provided. Layout synthesis is assumed to be performed by available tools like the GENESIL silicon compiler.<<ETX>>","PeriodicalId":261873,"journal":{"name":"[1991] Proceedings. First Great Lakes Symposium on VLSI","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"HADES-high-level architecture development and exploration system\",\"authors\":\"P. Poechmueller, M. Held, N. Wehn, M. Glesner\",\"doi\":\"10.1109/GLSV.1991.143995\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The authors propose a new approach to high level behavioural synthesis starting from an algorithmic description in Hardware C. The algorithm is compiled into a corresponding data/control flow graph including several optimizations. The behavioural synthesis part of the system performs transformations like loop unrolling, parallelization, etc., whereby the user is supported through a feedback loop. For final structural synthesis an advanced tool based on genetic algorithms is provided. Layout synthesis is assumed to be performed by available tools like the GENESIL silicon compiler.<<ETX>>\",\"PeriodicalId\":261873,\"journal\":{\"name\":\"[1991] Proceedings. First Great Lakes Symposium on VLSI\",\"volume\":\"10 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-03-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1991] Proceedings. First Great Lakes Symposium on VLSI\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/GLSV.1991.143995\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1991] Proceedings. First Great Lakes Symposium on VLSI","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GLSV.1991.143995","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
HADES-high-level architecture development and exploration system
The authors propose a new approach to high level behavioural synthesis starting from an algorithmic description in Hardware C. The algorithm is compiled into a corresponding data/control flow graph including several optimizations. The behavioural synthesis part of the system performs transformations like loop unrolling, parallelization, etc., whereby the user is supported through a feedback loop. For final structural synthesis an advanced tool based on genetic algorithms is provided. Layout synthesis is assumed to be performed by available tools like the GENESIL silicon compiler.<>