C. Greco, Enrico Nobile, S. Pontarelli, S. Teofili
{"title":"基于FPGA的多TCP连接状态检测复杂规则匹配体系结构","authors":"C. Greco, Enrico Nobile, S. Pontarelli, S. Teofili","doi":"10.1109/SPL.2010.5483029","DOIUrl":null,"url":null,"abstract":"In this paper a novel architecture for string matching is presented. It is oriented to an FPGA implementation and, differently from other similar works, it is particularly suitable for rules matching in multiple streams. The paper presents our developed architecture able to efficiently manage different streams, discusses how to optimize the design to limit the number of FPGA logic resources and shows the obtained results.","PeriodicalId":372692,"journal":{"name":"2010 VI Southern Programmable Logic Conference (SPL)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-03-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"An FPGA based architecture for complex rule matching with stateful inspection of multiple TCP connections\",\"authors\":\"C. Greco, Enrico Nobile, S. Pontarelli, S. Teofili\",\"doi\":\"10.1109/SPL.2010.5483029\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper a novel architecture for string matching is presented. It is oriented to an FPGA implementation and, differently from other similar works, it is particularly suitable for rules matching in multiple streams. The paper presents our developed architecture able to efficiently manage different streams, discusses how to optimize the design to limit the number of FPGA logic resources and shows the obtained results.\",\"PeriodicalId\":372692,\"journal\":{\"name\":\"2010 VI Southern Programmable Logic Conference (SPL)\",\"volume\":\"36 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-03-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 VI Southern Programmable Logic Conference (SPL)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SPL.2010.5483029\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 VI Southern Programmable Logic Conference (SPL)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SPL.2010.5483029","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An FPGA based architecture for complex rule matching with stateful inspection of multiple TCP connections
In this paper a novel architecture for string matching is presented. It is oriented to an FPGA implementation and, differently from other similar works, it is particularly suitable for rules matching in multiple streams. The paper presents our developed architecture able to efficiently manage different streams, discusses how to optimize the design to limit the number of FPGA logic resources and shows the obtained results.