新的CBGA封装,提高了2/sup和/ level的可靠性

R. Pendse, B. Afshari, N. Butel, J. Leibovitz, Y. Hosoi, M. Shimada, K. Maeda, M. Maeda, H. Yonekura
{"title":"新的CBGA封装,提高了2/sup和/ level的可靠性","authors":"R. Pendse, B. Afshari, N. Butel, J. Leibovitz, Y. Hosoi, M. Shimada, K. Maeda, M. Maeda, H. Yonekura","doi":"10.1109/ECTC.2000.853325","DOIUrl":null,"url":null,"abstract":"In the present work, we have studied several improvements in the materials, structure and design of the conventional flip chip-on-ceramic single chip package aimed at increasing the 2/sup nd/ level reliability. The use of a novel ceramic substrate material (\"HITCE Ceramic\"), coupled with systematic changes in design and assembly materials resulted in an improvement of 2/sup nd/ level reliability over the conventional alumina-based ceramic ball grid array (CBGA) package by approximately one order of magnitude. In the initial testing, a strong effect of the heat spreader (lid) structure on 2/sup nd/ level reliability was seen. A careful finite element modeling (FEM) study was undertaken to understand the interaction of the package structure with 2/sup nd/ level solder joint stress. The results of the study were validated based on empirical temp cycle data and by direct solder joint strain measurements using a novel strain measurement technique. Once validated, FEM was used as a tool for optimizing the package structure, namely, the lid material and thickness, the attach material between the lid and the the ceramic substrate, and the size and location of the attachment points. To minimize the impact on thermal performance and component level reliability, the die attach material was left unchanged. The optimized package structure was subsequently fabricated and subjected to 2/sup nd/ level reliability testing. An approximately one order of magnitude improvement was seen, consistent with FEM predictions. It was necessary to ensure that the component-level reliability was not compromised as a result of the higher coefficient of thermal expansion (CTE) of the ceramic substrate material (HITCE), which presented a greater CTE mismatch between the die and substrate compared to the case of alumina ceramic. Therefore, a re-selection of the underfill material was performed and the component-level reliability with the chosen underfill material was verified through temp cycling and moisture tests (Cond B temp cyl and HAST).","PeriodicalId":410140,"journal":{"name":"2000 Proceedings. 50th Electronic Components and Technology Conference (Cat. No.00CH37070)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":"{\"title\":\"New CBGA package with improved 2/sup nd/ level reliability\",\"authors\":\"R. Pendse, B. Afshari, N. Butel, J. Leibovitz, Y. Hosoi, M. Shimada, K. Maeda, M. Maeda, H. Yonekura\",\"doi\":\"10.1109/ECTC.2000.853325\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In the present work, we have studied several improvements in the materials, structure and design of the conventional flip chip-on-ceramic single chip package aimed at increasing the 2/sup nd/ level reliability. The use of a novel ceramic substrate material (\\\"HITCE Ceramic\\\"), coupled with systematic changes in design and assembly materials resulted in an improvement of 2/sup nd/ level reliability over the conventional alumina-based ceramic ball grid array (CBGA) package by approximately one order of magnitude. In the initial testing, a strong effect of the heat spreader (lid) structure on 2/sup nd/ level reliability was seen. A careful finite element modeling (FEM) study was undertaken to understand the interaction of the package structure with 2/sup nd/ level solder joint stress. The results of the study were validated based on empirical temp cycle data and by direct solder joint strain measurements using a novel strain measurement technique. Once validated, FEM was used as a tool for optimizing the package structure, namely, the lid material and thickness, the attach material between the lid and the the ceramic substrate, and the size and location of the attachment points. To minimize the impact on thermal performance and component level reliability, the die attach material was left unchanged. The optimized package structure was subsequently fabricated and subjected to 2/sup nd/ level reliability testing. An approximately one order of magnitude improvement was seen, consistent with FEM predictions. It was necessary to ensure that the component-level reliability was not compromised as a result of the higher coefficient of thermal expansion (CTE) of the ceramic substrate material (HITCE), which presented a greater CTE mismatch between the die and substrate compared to the case of alumina ceramic. Therefore, a re-selection of the underfill material was performed and the component-level reliability with the chosen underfill material was verified through temp cycling and moisture tests (Cond B temp cyl and HAST).\",\"PeriodicalId\":410140,\"journal\":{\"name\":\"2000 Proceedings. 50th Electronic Components and Technology Conference (Cat. No.00CH37070)\",\"volume\":\"33 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-05-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"19\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2000 Proceedings. 50th Electronic Components and Technology Conference (Cat. No.00CH37070)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECTC.2000.853325\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 Proceedings. 50th Electronic Components and Technology Conference (Cat. No.00CH37070)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.2000.853325","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 19

摘要

在本工作中,我们从材料、结构和设计等方面对传统的倒装陶瓷单芯片封装进行了改进,以提高2/sup和1 / level的可靠性。新型陶瓷基板材料(“HITCE陶瓷”)的使用,加上设计和组装材料的系统性变化,使得传统的氧化铝基陶瓷球栅阵列(CBGA)封装的2/sup和/ level可靠性提高了大约一个数量级。在最初的测试中,可以看到散热器(盖)结构对2/sup和/ level可靠性的强烈影响。为了了解封装结构与2/sup和/ level焊点应力之间的相互作用,进行了仔细的有限元建模研究。基于经验温度循环数据和采用新型应变测量技术直接测量焊点应变,验证了研究结果。验证后,将FEM作为优化封装结构的工具,即盖子的材料和厚度,盖子与陶瓷基板之间的附着材料,以及附着点的尺寸和位置。为了尽量减少对热性能和组件级可靠性的影响,模具附着材料保持不变。随后制作了优化后的封装结构,并进行了2/sup和1 / level可靠性测试。大约一个数量级的改进被看到,与FEM预测一致。由于陶瓷基板材料(HITCE)的热膨胀系数(CTE)较高,与氧化铝陶瓷的情况相比,模具和基板之间的CTE不匹配更大,因此有必要确保组件级可靠性不会受到影响。因此,进行了下填料材料的重新选择,并通过温度循环和湿度测试(第二个B温度循环和HAST)验证了所选下填料材料的组件级可靠性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
New CBGA package with improved 2/sup nd/ level reliability
In the present work, we have studied several improvements in the materials, structure and design of the conventional flip chip-on-ceramic single chip package aimed at increasing the 2/sup nd/ level reliability. The use of a novel ceramic substrate material ("HITCE Ceramic"), coupled with systematic changes in design and assembly materials resulted in an improvement of 2/sup nd/ level reliability over the conventional alumina-based ceramic ball grid array (CBGA) package by approximately one order of magnitude. In the initial testing, a strong effect of the heat spreader (lid) structure on 2/sup nd/ level reliability was seen. A careful finite element modeling (FEM) study was undertaken to understand the interaction of the package structure with 2/sup nd/ level solder joint stress. The results of the study were validated based on empirical temp cycle data and by direct solder joint strain measurements using a novel strain measurement technique. Once validated, FEM was used as a tool for optimizing the package structure, namely, the lid material and thickness, the attach material between the lid and the the ceramic substrate, and the size and location of the attachment points. To minimize the impact on thermal performance and component level reliability, the die attach material was left unchanged. The optimized package structure was subsequently fabricated and subjected to 2/sup nd/ level reliability testing. An approximately one order of magnitude improvement was seen, consistent with FEM predictions. It was necessary to ensure that the component-level reliability was not compromised as a result of the higher coefficient of thermal expansion (CTE) of the ceramic substrate material (HITCE), which presented a greater CTE mismatch between the die and substrate compared to the case of alumina ceramic. Therefore, a re-selection of the underfill material was performed and the component-level reliability with the chosen underfill material was verified through temp cycling and moisture tests (Cond B temp cyl and HAST).
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