零中频下变频器的IP2改进技术

2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers Pub Date : 2006-09-18 DOI:10.1109/ISSCC.2006.1696243

H. Darabi, Hea Joung Kim, J. Chiu, B. Ibrahim, L. Serrano

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引用次数: 32

摘要

提出了一种改善零中频或低中频接收机混频器二阶非线性的IP2校准电路。该电路允许混频器独立优化，并且对接收器噪声系数，面积和功耗的影响可以忽略不计。制作了一个包含0.13 μ m CMOS校准电路的收发器原型。测量到平均IIP2提高了18dB

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An IP2 Improvement Technique for Zero-IF Down-Converters

An IP2 calibration circuit to improve the 2nd-order nonlinearity of mixers in zero or low-IF receivers is presented. The circuit allows the mixers to be optimized independently, and has negligible impact on receiver noise figure, area, and power consumption. A prototype transceiver including the calibration circuitry in 0.13mum CMOS is fabricated. An average IIP2 improvement of 18dB is measured

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2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers

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