M. Saito, M. Ono, R. Fujimoto, C. Takahashi, H. Tanimoto, N. Ito, T. Ohguro, T. Yoshitomi, H. Momose, H. Iwai
{"title":"小几何尺寸硅mosfet的优势,适用于0.5 V低电源电压下的高频模拟应用","authors":"M. Saito, M. Ono, R. Fujimoto, C. Takahashi, H. Tanimoto, N. Ito, T. Ohguro, T. Yoshitomi, H. Momose, H. Iwai","doi":"10.1109/VLSIT.1995.520863","DOIUrl":null,"url":null,"abstract":"Low noise high-frequency analog operation of small geometry silicon MOSFETs is demonstrated. By scaling gate length down to 0.3-sub 0.1 /spl mu/m regions, excellent low noise figure of 1.5 dB at 2 GHz was obtained with low drain current of 0.3 mA//spl mu/m at f/sub T/ value of 20-65 GHz-the same level as today's high performance silicon bipolar transistors in research level. Even at low voltage operation such as 0.5 V, extremely high cutoff frequency of 48 GHz was realized by sub 0.1 /spl mu/m gate length nMOSFETs. Such low voltage operations allow one order of magnitude smaller power consumption compared with 2 V power supply voltage.","PeriodicalId":328379,"journal":{"name":"1995 Symposium on VLSI Technology. Digest of Technical Papers","volume":"2013 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Advantage of small geometry silicon MOSFETs for high-frequency analog applications under low power supply voltage of 0.5 V\",\"authors\":\"M. Saito, M. Ono, R. Fujimoto, C. Takahashi, H. Tanimoto, N. Ito, T. Ohguro, T. Yoshitomi, H. Momose, H. Iwai\",\"doi\":\"10.1109/VLSIT.1995.520863\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Low noise high-frequency analog operation of small geometry silicon MOSFETs is demonstrated. By scaling gate length down to 0.3-sub 0.1 /spl mu/m regions, excellent low noise figure of 1.5 dB at 2 GHz was obtained with low drain current of 0.3 mA//spl mu/m at f/sub T/ value of 20-65 GHz-the same level as today's high performance silicon bipolar transistors in research level. Even at low voltage operation such as 0.5 V, extremely high cutoff frequency of 48 GHz was realized by sub 0.1 /spl mu/m gate length nMOSFETs. Such low voltage operations allow one order of magnitude smaller power consumption compared with 2 V power supply voltage.\",\"PeriodicalId\":328379,\"journal\":{\"name\":\"1995 Symposium on VLSI Technology. Digest of Technical Papers\",\"volume\":\"2013 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-06-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1995 Symposium on VLSI Technology. Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIT.1995.520863\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1995 Symposium on VLSI Technology. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.1995.520863","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Advantage of small geometry silicon MOSFETs for high-frequency analog applications under low power supply voltage of 0.5 V
Low noise high-frequency analog operation of small geometry silicon MOSFETs is demonstrated. By scaling gate length down to 0.3-sub 0.1 /spl mu/m regions, excellent low noise figure of 1.5 dB at 2 GHz was obtained with low drain current of 0.3 mA//spl mu/m at f/sub T/ value of 20-65 GHz-the same level as today's high performance silicon bipolar transistors in research level. Even at low voltage operation such as 0.5 V, extremely high cutoff frequency of 48 GHz was realized by sub 0.1 /spl mu/m gate length nMOSFETs. Such low voltage operations allow one order of magnitude smaller power consumption compared with 2 V power supply voltage.