Sunghyun Yoon, Sung I. Hong, Daehyun Kim, Garam Choi, Young Mo Kim, Kyunghoon Min, Seiyon Kim, Myung-Hee Na, Seonyong Cha
{"title":"基于Cell Stack工程的QLC可编程3D铁电NAND闪存","authors":"Sunghyun Yoon, Sung I. Hong, Daehyun Kim, Garam Choi, Young Mo Kim, Kyunghoon Min, Seiyon Kim, Myung-Hee Na, Seonyong Cha","doi":"10.23919/VLSITechnologyandCir57934.2023.10185294","DOIUrl":null,"url":null,"abstract":"3D ferroelectric NAND (Fe-NAND) Quad-level cell (QLC) operation has been demonstrated for the first time to our knowledge, using the 3D CTN NAND test vehicle for mass production. The 3D Fe-NAND is optimized by engineering the cell stack layers, enlarging a program/erase (PE) window up to 10.5 V. QLC operation is successfully verified with the minimum gap margin of 0.24 V. Endurance and data retention characteristics are also reported.","PeriodicalId":317958,"journal":{"name":"2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"QLC Programmable 3D Ferroelectric NAND Flash Memory by Memory Window Expansion using Cell Stack Engineering\",\"authors\":\"Sunghyun Yoon, Sung I. Hong, Daehyun Kim, Garam Choi, Young Mo Kim, Kyunghoon Min, Seiyon Kim, Myung-Hee Na, Seonyong Cha\",\"doi\":\"10.23919/VLSITechnologyandCir57934.2023.10185294\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"3D ferroelectric NAND (Fe-NAND) Quad-level cell (QLC) operation has been demonstrated for the first time to our knowledge, using the 3D CTN NAND test vehicle for mass production. The 3D Fe-NAND is optimized by engineering the cell stack layers, enlarging a program/erase (PE) window up to 10.5 V. QLC operation is successfully verified with the minimum gap margin of 0.24 V. Endurance and data retention characteristics are also reported.\",\"PeriodicalId\":317958,\"journal\":{\"name\":\"2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)\",\"volume\":\"13 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-06-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185294\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185294","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
QLC Programmable 3D Ferroelectric NAND Flash Memory by Memory Window Expansion using Cell Stack Engineering
3D ferroelectric NAND (Fe-NAND) Quad-level cell (QLC) operation has been demonstrated for the first time to our knowledge, using the 3D CTN NAND test vehicle for mass production. The 3D Fe-NAND is optimized by engineering the cell stack layers, enlarging a program/erase (PE) window up to 10.5 V. QLC operation is successfully verified with the minimum gap margin of 0.24 V. Endurance and data retention characteristics are also reported.