反垫阵列对PCB电网面积填充电感的影响

2017 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS) Pub Date : 2017-12-01 DOI:10.1109/EDAPS.2017.8277012

Qixuan Sun, S. Bai, J. Drewniak, E. Li

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引用次数: 0

摘要

低阻抗配电网络(PDN)对于高速印刷电路板的功能至关重要。布局前阻抗计算可以避免在布局后阶段进行耗时的设计变更。电感估计的设计曲线便于在预布置阶段使用。然而，在这些设计曲线中没有考虑到由反垫引起的功率平面高密度空隙。本文讨论了两种常见情况下由反焊片引起的额外电感。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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The influence of anti-pad array on the inductance of PCB power net area fill

A low impedance power distribution network (PDN) is essential for the functionality of high speed printed circuit boards. A pre-layout impedance calculation can avoid time consuming changes on the design during post-layout stage. Design curves for inductance estimation are convenient to use in pre-layout stage. However, the high density voids on the power plane, which is caused by the anti-pads, are not considered in those design curves. This short paper discussed the extra inductance caused by the anti-pads, in two common situations.

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2017 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)

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