用于嵌入式系统的可重构处理器体系结构和软件开发环境

F. Campi, A. Cappelli, R. Guerrieri, Andrea Lodi, M. Toma, A. L. Rosa, L. Lavagno, C. Passerone, R. Canegallo
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引用次数: 12

摘要

灵活性、高计算能力和低能耗是设计新一代嵌入式处理器的重要准则。传统架构不再适合在这些相互矛盾的实现需求之间提供一个很好的折衷方案。在本文中,我们提出了一种新的可重构处理器,它将VLIW架构与一个可配置单元紧密耦合,实现了一个额外的可配置管道。介绍了软件开发环境,为应用程序开发和性能仿真提供了一个用户友好的工具。最后,我们证明了所提出的硬件/软件可重构平台在信号处理计算内核上实现了速度和能耗的显著提高。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A reconfigurable processor architecture and software development environment for embedded systems
Flexibility, high computing power and low energy consumption are strong guidelines when designing new generation embedded processors. Traditional architectures are no longer suitable to provide a good compromise among these contradictory implementation requirements. In this paper we present a new reconfigurable processor that tightly couples a VLIW architecture with a configurable unit implementing an additional configurable pipeline. A software development environment is also introduced providing a user-friendly tool for application development and performance simulation. Finally, we show that the HW/SW reconfigurable platform proposed achieves dramatic improvement in both speed and energy consumption on signal processing computation kernels.
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