E. Ogura, Y. Ikenaga, Y. Iida, Y. Hosoya, M. Takashima, K. Yamash
{"title":"采用简单高效算法的低成本运动估计处理器LSI","authors":"E. Ogura, Y. Ikenaga, Y. Iida, Y. Hosoya, M. Takashima, K. Yamash","doi":"10.1109/ICCE.1995.517973","DOIUrl":null,"url":null,"abstract":"A motion estimation processor LSI has been developed using a simple and efficient algorithm while maintaining the accuracy of full search block matching. Only a single chip is required for performing field and frame real-time motion estimation at half-pel precision. This chip is capable of processing ITU-R601 video sequence for MPEG2 encoding with a 27 MHz clock. >","PeriodicalId":306595,"journal":{"name":"Proceedings of International Conference on Consumer Electronics","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"A Cost Effective Motion Estimation Processor LSI Using a Simple and Efficient Algorithm\",\"authors\":\"E. Ogura, Y. Ikenaga, Y. Iida, Y. Hosoya, M. Takashima, K. Yamash\",\"doi\":\"10.1109/ICCE.1995.517973\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A motion estimation processor LSI has been developed using a simple and efficient algorithm while maintaining the accuracy of full search block matching. Only a single chip is required for performing field and frame real-time motion estimation at half-pel precision. This chip is capable of processing ITU-R601 video sequence for MPEG2 encoding with a 27 MHz clock. >\",\"PeriodicalId\":306595,\"journal\":{\"name\":\"Proceedings of International Conference on Consumer Electronics\",\"volume\":\"11 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of International Conference on Consumer Electronics\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCE.1995.517973\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of International Conference on Consumer Electronics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCE.1995.517973","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Cost Effective Motion Estimation Processor LSI Using a Simple and Efficient Algorithm
A motion estimation processor LSI has been developed using a simple and efficient algorithm while maintaining the accuracy of full search block matching. Only a single chip is required for performing field and frame real-time motion estimation at half-pel precision. This chip is capable of processing ITU-R601 video sequence for MPEG2 encoding with a 27 MHz clock. >