{"title":"设计方法和CAD工具[VLSI]","authors":"C. Piguet","doi":"10.1109/CICC.1989.56845","DOIUrl":null,"url":null,"abstract":"VLSI design methodologies with fewer abstraction levels than usual are discussed. It is felt that such methods are easier to use and to automatize, while still providing efficient chips. RISC (reduced-instruction-set computer) and CISC (complex-instruction-set computer) methodologies as well as a floorplan-oriented methodology are discussed","PeriodicalId":165054,"journal":{"name":"1989 Proceedings of the IEEE Custom Integrated Circuits Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design methodologies and CAD tools [VLSI]\",\"authors\":\"C. Piguet\",\"doi\":\"10.1109/CICC.1989.56845\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"VLSI design methodologies with fewer abstraction levels than usual are discussed. It is felt that such methods are easier to use and to automatize, while still providing efficient chips. RISC (reduced-instruction-set computer) and CISC (complex-instruction-set computer) methodologies as well as a floorplan-oriented methodology are discussed\",\"PeriodicalId\":165054,\"journal\":{\"name\":\"1989 Proceedings of the IEEE Custom Integrated Circuits Conference\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-05-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1989 Proceedings of the IEEE Custom Integrated Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.1989.56845\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1989 Proceedings of the IEEE Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.1989.56845","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
VLSI design methodologies with fewer abstraction levels than usual are discussed. It is felt that such methods are easier to use and to automatize, while still providing efficient chips. RISC (reduced-instruction-set computer) and CISC (complex-instruction-set computer) methodologies as well as a floorplan-oriented methodology are discussed