使用多门双极晶体管的可编程逻辑元件

Ashton Snelgrove, P. Gaillardon
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引用次数: 0

摘要

我们提出了一种通用逻辑元件,具有八种变化,使用多门双极晶体管构建,足以取代fpga中的lut。我们使用10nm硅纳米线三输入栅极晶体管模型模拟了新的逻辑元件,并将所提出的元件与使用相同技术模型实现的文献中的查找表和可重构逻辑元件进行了比较。我们比较了延迟,功率和晶体管数量的不同元素,特别考虑了配置存储的成本。与等效LUT相比,具有最可用布尔函数的逻辑元件变化使用了90%的晶体管,延迟损失为102%,动态和静态功率分别提高了97%和91%。最小的变化使用了42%的晶体管,延迟提高了76%,动态和静态功率分别提高了43%和43%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Programmable logic elements using multigate ambipolar transistors
We propose a general purpose logic element with eight variations, built using multigate ambipolar transistors, sufficiently capable to replace LUTs in FPGAs. We simulate the new logic element using a 10nm silicon-nanowire three-input-gate transistor model, and compare the proposed element to lookup tables and reconfigurable logic elements from the literature implemented using the same technology model. We compare the different elements for delay, power, and number of transistors, specifically accounting for the cost of configuration storage. Compared to an equivalent LUT, the logic element variation with the most available boolean functions uses 90% of the transistors, with a penalty in delay of 102%, and improved dynamic and static power of 97% and 91%, respectively. The smallest variation uses 42% of the transistors, with improved delay of 76%, and improved dynamic and static power of 43% and 43%, respectively.
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