Extraction of Accumulation Mobility from C-V Characteristics of Pentacene MIS Structures

A novel method for extracting accumulation mobility of pentacene thin films has been proposed. To obtain the mobility, the sheet resistance and the accumulation charge of the film under negative gate bias are obtained from the capacitance-voltage(C-V) characteristics of the pentacene MIS structures. The value of the extracted mobility is 24% lower than that determined from the I-V characteristics ofOFET by conventional method [1]. Besides the attention paid to the mobility as a key performance factor in organic electronics, the mobility extraction method itself has been studied widely. Most of the methods using I-V characteristics require an accurate IV equation such as the silicon long-channel MOSFET model, but establishing a general OFET I-V equation has been a difficult problem. Therefore, to extract more reliable mobility, a novel mobility extraction method using C-V characteristics of pentacene MIS structure is described in this paper. Fig. 1 shows the cross-sectional view and top view of the fabricated devices. An n+-Si wafer is used as a gate electrode, and 35 nm-thick oxide is used as a gate insulator. Dilute PMMA is spin-coated on the SiO2 for the surface treatment. Finally, pentacene and gold are evaporated sequentially through shadow masks. The width W of the peripheral region is controlled by the shadow mask from 15 ptm to 95 ptm. C-V characteristics are measured in air with 14P4284A LCR meter with the frequency of 100 Hz -1 MHz and the gate voltage of-O0 V -10 V. In Fig. 2, the value of measured capacitance(C101) of the device is separated into three different capacitances: the insulator capacitance(C1), pentacene-gold overlapping capacitance(C2), and the peripheral region capacitance(Cp). Ci is directly measured from MIM capacitor, and C0, and Cp are indirectly obtained using the relation of C0,= C101 C, and C,= Ct1tC, C-C. Fig. 3 and Fig. 4 show the separation of Ct,t(W=75 rim) with different gate bias and measuring frequency, respectively. To extract the accumulation mobility pcac from pac= 1 IPhQA at a specific gate voltage, e.g., VG= -10 V, the sheet resistance Psh and the total accumulation charge per unit area QA at VG= -10 V should be known. First, QA of 716.22 nC/cm2 at VG = -10 V is directly obtained from the integration of C0, curve [2] as shown in Fig. 5. The flat band voltage VFB in the integration is determined from 11C0V2 curve to be -1.08 V. Next, to obtain Psh from the peripheral region capacitance CP, R-C network model in Fig. 6 is adopted to describe CP versus frequency behavior assuming uniform resistance R along the whole peripheral region and negligible resistance in the n+-Si gate and the contact. By the analogy with the small-signal gate resistance model of silicon MOSFETs [3], Cp versus frequency relation is given as