高效内置自检算法的内存

Proceedings of the Ninth Asian Test Symposium Pub Date : 2000-12-04 DOI:10.1109/ATS.2000.893604

Sying-Jyan Wang, Chen-Jung Wei

{"title":"高效内置自检算法的内存","authors":"Sying-Jyan Wang, Chen-Jung Wei","doi":"10.1109/ATS.2000.893604","DOIUrl":null,"url":null,"abstract":"We present a new pseudorandom testing algorithm for the Built-In Self-Test (BIST) of DRAM. In this algorithm, test patterns are complemented to generate state-transitions that are needed for the detection of coupling faults. As a result, the number of test patterns required is less than half of the traditional method, while the extra hardware is negligible.","PeriodicalId":403864,"journal":{"name":"Proceedings of the Ninth Asian Test Symposium","volume":"83 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-12-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Efficient built-in self-test algorithm for memory\",\"authors\":\"Sying-Jyan Wang, Chen-Jung Wei\",\"doi\":\"10.1109/ATS.2000.893604\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We present a new pseudorandom testing algorithm for the Built-In Self-Test (BIST) of DRAM. In this algorithm, test patterns are complemented to generate state-transitions that are needed for the detection of coupling faults. As a result, the number of test patterns required is less than half of the traditional method, while the extra hardware is negligible.\",\"PeriodicalId\":403864,\"journal\":{\"name\":\"Proceedings of the Ninth Asian Test Symposium\",\"volume\":\"83 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-12-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the Ninth Asian Test Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ATS.2000.893604\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the Ninth Asian Test Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS.2000.893604","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 4

摘要

提出了一种新的DRAM内置自检伪随机测试算法。在该算法中，通过补充测试模式来生成检测耦合故障所需的状态转换。因此，所需的测试模式数量少于传统方法的一半，而额外的硬件可以忽略不计。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Efficient built-in self-test algorithm for memory

We present a new pseudorandom testing algorithm for the Built-In Self-Test (BIST) of DRAM. In this algorithm, test patterns are complemented to generate state-transitions that are needed for the detection of coupling faults. As a result, the number of test patterns required is less than half of the traditional method, while the extra hardware is negligible.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

Proceedings of the Ninth Asian Test Symposium

自引率

0.00%

发文量