一种65nm CMOS分阵C-2C开关电容功率放大器

Zhidong Bai, Wen Yuan, A. Azam, J. Walling
{"title":"一种65nm CMOS分阵C-2C开关电容功率放大器","authors":"Zhidong Bai, Wen Yuan, A. Azam, J. Walling","doi":"10.1109/RFIC.2017.7969086","DOIUrl":null,"url":null,"abstract":"A multiphase RF, C-2C split-array switched-capacitor power amplifier (SCPA) is introduced that allows the resolution and quality factor of the SCPA to be independently controlled. This allows the SCPA to be designed up to the resolution limit of the process, as determined by capacitor matching and jitter in the clock. In prior SCPAs, the resolution was limited by the choice of the output matching network quality factor and the minimum sized capacitor available in the process. A split-array, C-2C SCPA is implemented in 65nm CMOS and occupies 0.85×2mm2. It delivers a peak output power of 24.05 dBm with a peak system efficiency (SE) of 40.6%. When transmitting a 1.4 MHz, 64 QAM LTE signal it outputs 18.8 dBm at 21.6% SE, with a measured EVM of 2.65 %-rms at 1.8 GHz.","PeriodicalId":349922,"journal":{"name":"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A split-array, C-2C switched-capacitor power amplifier in 65nm CMOS\",\"authors\":\"Zhidong Bai, Wen Yuan, A. Azam, J. Walling\",\"doi\":\"10.1109/RFIC.2017.7969086\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A multiphase RF, C-2C split-array switched-capacitor power amplifier (SCPA) is introduced that allows the resolution and quality factor of the SCPA to be independently controlled. This allows the SCPA to be designed up to the resolution limit of the process, as determined by capacitor matching and jitter in the clock. In prior SCPAs, the resolution was limited by the choice of the output matching network quality factor and the minimum sized capacitor available in the process. A split-array, C-2C SCPA is implemented in 65nm CMOS and occupies 0.85×2mm2. It delivers a peak output power of 24.05 dBm with a peak system efficiency (SE) of 40.6%. When transmitting a 1.4 MHz, 64 QAM LTE signal it outputs 18.8 dBm at 21.6% SE, with a measured EVM of 2.65 %-rms at 1.8 GHz.\",\"PeriodicalId\":349922,\"journal\":{\"name\":\"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"volume\":\"16 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC.2017.7969086\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2017.7969086","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

摘要

介绍了一种多相射频C-2C分阵开关电容功率放大器(SCPA),该放大器的分辨率和质量因数可独立控制。这使得SCPA可以设计到该过程的分辨率限制,由电容器匹配和时钟抖动决定。在先前的scpa中,分辨率受到输出匹配网络质量因子和过程中可用的最小尺寸电容器的选择的限制。分阵C-2C SCPA在65nm CMOS中实现,占用0.85×2mm2。峰值输出功率为24.05 dBm,峰值系统效率(SE)为40.6%。当传输1.4 MHz, 64 QAM LTE信号时,它在21.6% SE下输出18.8 dBm,在1.8 GHz时测量到的EVM为2.65% -rms。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A split-array, C-2C switched-capacitor power amplifier in 65nm CMOS
A multiphase RF, C-2C split-array switched-capacitor power amplifier (SCPA) is introduced that allows the resolution and quality factor of the SCPA to be independently controlled. This allows the SCPA to be designed up to the resolution limit of the process, as determined by capacitor matching and jitter in the clock. In prior SCPAs, the resolution was limited by the choice of the output matching network quality factor and the minimum sized capacitor available in the process. A split-array, C-2C SCPA is implemented in 65nm CMOS and occupies 0.85×2mm2. It delivers a peak output power of 24.05 dBm with a peak system efficiency (SE) of 40.6%. When transmitting a 1.4 MHz, 64 QAM LTE signal it outputs 18.8 dBm at 21.6% SE, with a measured EVM of 2.65 %-rms at 1.8 GHz.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信