用于功率集成电路的硅晶圆直接键合的小翘曲介质隔离晶圆

Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90. Pub Date : 1990-04-04 DOI:10.1109/ISPSD.1990.991081

K. Furukawa, A. Nakagawa, K. Tanzawa, N. Kawamura

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引用次数: 1

摘要

研究了直接键合制备的介质隔离晶圆的翘曲机理。揭示了影响翘曲的三个因素。它们是弹性变形，这是直接键合和多晶硅沉积所特有的现象。通过对这些因素的研究，将3英寸直径晶圆的翘曲量减小到几微米。直接粘合6英寸直径的晶圆，得到5英寸直径的SO1晶圆。SO1晶圆的翘曲量为13 ~ 34 p。这些结果表明，5英寸的介质隔离晶圆可以应用于功率IC制造。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Small warpage dielectrically isolated wafer for power ICs by silicon wafer direct-bonding

The warpage mechanism was investigated for dielectlically isolated wafers, fabricated by the direct bonding. Three factors affecting the warpage were revealed. They were elastic deformation, a phenomenon peculiar to the direct bonding and poly-Si deposition. The investigation on these factors reduce the warpage to a few microns for 3 inch diameter wafers. Six inch diameter wafers were directly bonded to obtain 5 inch diameter SO1 wafers. The warpage for the SO1 wafer was 13 to 34 p. These results show that a 5 inch dielectlically isolated wafer can be applicable t o power IC fabrications.

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Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90.

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