恒输出驻波比在负载最优阻抗附近的点轨迹:功率晶体管稳健性的评估

2006 67th ARFTG Conference Pub Date : 2006-06-12 DOI:10.1109/ARFTG.2006.4734357

F. Blanchet, H. Bousbia, D. Barataud, J. Nebus, D. Pache

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引用次数: 3

摘要

本文确定了负载基频最佳阻抗附近输出电压驻波比恒定点的位置。该分辨率对确定功率晶体管的鲁棒性非常有帮助。为了说明这一点，给出了在意法半导体技术的Si/SiGe HBT上的一些测量结果。测量是在两个多谐负载-拉力试验台上实现的:一个是被动的，一个是主动的。

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The locus of points of constant output VSWR around the load optimal impedance: Evaluation of power transistors robustness

This paper determines the locus of points of constant output voltage standing wave ratio (VSWR) around the load optimal impedance at the fundamental frequency. This resolution is very helpful to determine the power transistors robustness. To illustrate this, some measurements results are presented on a Si/SiGe HBT of STMicroelectronics technology. The measurements are realized on two multi-harmonic load-pull test-benches: one passive and one active.

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2006 67th ARFTG Conference

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