用积分方程法预测通孔的电容和电感

Proceedings of IEEE Electrical Performance of Electronic Packaging Pub Date : 1993-10-20 DOI:10.1109/EPEP.1993.394571

P. Kok, D. De Zutter

{"title":"用积分方程法预测通孔的电容和电感","authors":"P. Kok, D. De Zutter","doi":"10.1109/EPEP.1993.394571","DOIUrl":null,"url":null,"abstract":"A quasi-static method is described for calculating the excess capacitance and inductance of via's. The considered via geometry contains connecting strips, pads on the via, and finite ground plane thickness. The influence of the pad size and the size of the ground plane opening on the via capacitance, inductance and impedance is examined.<<ETX>>","PeriodicalId":338671,"journal":{"name":"Proceedings of IEEE Electrical Performance of Electronic Packaging","volume":"34 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"An integral equation approach to the prediction of the capacitance and the inductance of a via through-hole\",\"authors\":\"P. Kok, D. De Zutter\",\"doi\":\"10.1109/EPEP.1993.394571\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A quasi-static method is described for calculating the excess capacitance and inductance of via's. The considered via geometry contains connecting strips, pads on the via, and finite ground plane thickness. The influence of the pad size and the size of the ground plane opening on the via capacitance, inductance and impedance is examined.<<ETX>>\",\"PeriodicalId\":338671,\"journal\":{\"name\":\"Proceedings of IEEE Electrical Performance of Electronic Packaging\",\"volume\":\"34 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1993-10-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of IEEE Electrical Performance of Electronic Packaging\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPEP.1993.394571\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of IEEE Electrical Performance of Electronic Packaging","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEP.1993.394571","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 2

摘要

描述了一种准静态计算过孔电容和电感的方法。考虑的通孔几何结构包括连接条、通孔上的焊盘和有限的地平面厚度。考察了焊盘尺寸和接地平面开口尺寸对通孔电容、电感和阻抗的影响。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

An integral equation approach to the prediction of the capacitance and the inductance of a via through-hole

A quasi-static method is described for calculating the excess capacitance and inductance of via's. The considered via geometry contains connecting strips, pads on the via, and finite ground plane thickness. The influence of the pad size and the size of the ground plane opening on the via capacitance, inductance and impedance is examined.<>

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

Proceedings of IEEE Electrical Performance of Electronic Packaging

自引率

0.00%

发文量