{"title":"高密度多层LSI的研究","authors":"M. Matsunami, M. Koba, R. Miyake","doi":"10.1109/ICWSI.1990.63916","DOIUrl":null,"url":null,"abstract":"Describes a new type of high density multilayer LSI chip which is made up of several piled chips. Prescribed interconnections on the conventional wafer, are fabricated first. Thin chips with through-holes (about the size of pad) are fixed to the available parts of the under-layer chip. Each chip is interconnected through the holes. As a result, the chips will be equivalent to a hybrid IC which has several chips. This model is equal to the large scale high density LSI, the multichip substrate system, and hybrid WSI (Wafer Scale Integration).<<ETX>>","PeriodicalId":206140,"journal":{"name":"1990 Proceedings. International Conference on Wafer Scale Integration","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-01-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A study of high density multilayer LSI\",\"authors\":\"M. Matsunami, M. Koba, R. Miyake\",\"doi\":\"10.1109/ICWSI.1990.63916\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Describes a new type of high density multilayer LSI chip which is made up of several piled chips. Prescribed interconnections on the conventional wafer, are fabricated first. Thin chips with through-holes (about the size of pad) are fixed to the available parts of the under-layer chip. Each chip is interconnected through the holes. As a result, the chips will be equivalent to a hybrid IC which has several chips. This model is equal to the large scale high density LSI, the multichip substrate system, and hybrid WSI (Wafer Scale Integration).<<ETX>>\",\"PeriodicalId\":206140,\"journal\":{\"name\":\"1990 Proceedings. International Conference on Wafer Scale Integration\",\"volume\":\"21 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-01-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1990 Proceedings. International Conference on Wafer Scale Integration\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICWSI.1990.63916\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1990 Proceedings. International Conference on Wafer Scale Integration","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICWSI.1990.63916","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Describes a new type of high density multilayer LSI chip which is made up of several piled chips. Prescribed interconnections on the conventional wafer, are fabricated first. Thin chips with through-holes (about the size of pad) are fixed to the available parts of the under-layer chip. Each chip is interconnected through the holes. As a result, the chips will be equivalent to a hybrid IC which has several chips. This model is equal to the large scale high density LSI, the multichip substrate system, and hybrid WSI (Wafer Scale Integration).<>
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