{"title":"互补电阻开关(CRS)交叉栅阵列的解析建模与泄漏优化","authors":"S. Ambrogio, S. Balatti, D. Ielmini, D. Gilmer","doi":"10.1109/ESSDERC.2014.6948805","DOIUrl":null,"url":null,"abstract":"Resistive switching memory (RRAM) is attracting strong interest for prolonging Moore's law of future-generation memory and logic circuits. To enable the design of stand-alone and embedded RRAM, however, physically-based compact models are needed. This work presents a new analytical model for HfO2-based RRAM and of the complementary resistive switch (CRS), consisting of an antiserial connection of two resistive devices. The model is validated against switching characteristics at increasing pulse width for both RRAM and CRS. The impact of the oxide resistivity on the CRS characteristics is discussed, highlighting the trade-off between off-state leakage and set/reset window.","PeriodicalId":262652,"journal":{"name":"2014 44th European Solid State Device Research Conference (ESSDERC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Analytical modelling and leakage optimization in complementary resistive switch (CRS) crossbar arrays\",\"authors\":\"S. Ambrogio, S. Balatti, D. Ielmini, D. Gilmer\",\"doi\":\"10.1109/ESSDERC.2014.6948805\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Resistive switching memory (RRAM) is attracting strong interest for prolonging Moore's law of future-generation memory and logic circuits. To enable the design of stand-alone and embedded RRAM, however, physically-based compact models are needed. This work presents a new analytical model for HfO2-based RRAM and of the complementary resistive switch (CRS), consisting of an antiserial connection of two resistive devices. The model is validated against switching characteristics at increasing pulse width for both RRAM and CRS. The impact of the oxide resistivity on the CRS characteristics is discussed, highlighting the trade-off between off-state leakage and set/reset window.\",\"PeriodicalId\":262652,\"journal\":{\"name\":\"2014 44th European Solid State Device Research Conference (ESSDERC)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-11-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 44th European Solid State Device Research Conference (ESSDERC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSDERC.2014.6948805\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 44th European Solid State Device Research Conference (ESSDERC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSDERC.2014.6948805","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Analytical modelling and leakage optimization in complementary resistive switch (CRS) crossbar arrays
Resistive switching memory (RRAM) is attracting strong interest for prolonging Moore's law of future-generation memory and logic circuits. To enable the design of stand-alone and embedded RRAM, however, physically-based compact models are needed. This work presents a new analytical model for HfO2-based RRAM and of the complementary resistive switch (CRS), consisting of an antiserial connection of two resistive devices. The model is validated against switching characteristics at increasing pulse width for both RRAM and CRS. The impact of the oxide resistivity on the CRS characteristics is discussed, highlighting the trade-off between off-state leakage and set/reset window.
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