{"title":"非定时TLM的基于会合点的MoC","authors":"R. Jindal, L. Maillet-Contoz","doi":"10.1109/ISSOC.2007.4427449","DOIUrl":null,"url":null,"abstract":"Transaction level modeling (TLM) is increasingly been touted as the next abstraction level for SoC design after the register-transfer level. The benefits of this new approach are many and find its applications in verification, software validation and architectural exploration. As the TLM systems are modeled as a set of parallel processes, issues of communication, synchronization, and timing are essential to understand, analyze and verify for overall system behavior -choosing an appropriate Model of Computation (MoC) for this purpose becomes important.","PeriodicalId":244119,"journal":{"name":"2007 International Symposium on System-on-Chip","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Rendezvous-based MoC for untimed TLM\",\"authors\":\"R. Jindal, L. Maillet-Contoz\",\"doi\":\"10.1109/ISSOC.2007.4427449\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Transaction level modeling (TLM) is increasingly been touted as the next abstraction level for SoC design after the register-transfer level. The benefits of this new approach are many and find its applications in verification, software validation and architectural exploration. As the TLM systems are modeled as a set of parallel processes, issues of communication, synchronization, and timing are essential to understand, analyze and verify for overall system behavior -choosing an appropriate Model of Computation (MoC) for this purpose becomes important.\",\"PeriodicalId\":244119,\"journal\":{\"name\":\"2007 International Symposium on System-on-Chip\",\"volume\":\"26 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 International Symposium on System-on-Chip\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSOC.2007.4427449\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 International Symposium on System-on-Chip","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSOC.2007.4427449","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Transaction level modeling (TLM) is increasingly been touted as the next abstraction level for SoC design after the register-transfer level. The benefits of this new approach are many and find its applications in verification, software validation and architectural exploration. As the TLM systems are modeled as a set of parallel processes, issues of communication, synchronization, and timing are essential to understand, analyze and verify for overall system behavior -choosing an appropriate Model of Computation (MoC) for this purpose becomes important.
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