{"title":"高速ECL技术和互连技术的进展","authors":"K. Ohno","doi":"10.1109/EUASIC.1991.212904","DOIUrl":null,"url":null,"abstract":"Explores recent developments in bipolar silicon technology and the production of advanced ECL (Emitter Coupled Logic) IC devices. Refined structural techniques and device scaling have been the major contributors to improved performance. Examples are given of how these silicon techniques have been combined with high density packaging and used to implement today's 'super computers'. The effect of reduced basic gate delays and on-chip wiring delays is contrasted with the effect of relatively long interconnection delays on the whole system performance. Further developments aimed at improving both basic gate delay and wiring delay are continuing, and even higher performance bipolar silicon devices will continue.<<ETX>>","PeriodicalId":118990,"journal":{"name":"Euro ASIC '91","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Advances in high speed ECL technology and interconnection techniques\",\"authors\":\"K. Ohno\",\"doi\":\"10.1109/EUASIC.1991.212904\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Explores recent developments in bipolar silicon technology and the production of advanced ECL (Emitter Coupled Logic) IC devices. Refined structural techniques and device scaling have been the major contributors to improved performance. Examples are given of how these silicon techniques have been combined with high density packaging and used to implement today's 'super computers'. The effect of reduced basic gate delays and on-chip wiring delays is contrasted with the effect of relatively long interconnection delays on the whole system performance. Further developments aimed at improving both basic gate delay and wiring delay are continuing, and even higher performance bipolar silicon devices will continue.<<ETX>>\",\"PeriodicalId\":118990,\"journal\":{\"name\":\"Euro ASIC '91\",\"volume\":\"23 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-05-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Euro ASIC '91\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EUASIC.1991.212904\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Euro ASIC '91","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EUASIC.1991.212904","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Advances in high speed ECL technology and interconnection techniques
Explores recent developments in bipolar silicon technology and the production of advanced ECL (Emitter Coupled Logic) IC devices. Refined structural techniques and device scaling have been the major contributors to improved performance. Examples are given of how these silicon techniques have been combined with high density packaging and used to implement today's 'super computers'. The effect of reduced basic gate delays and on-chip wiring delays is contrasted with the effect of relatively long interconnection delays on the whole system performance. Further developments aimed at improving both basic gate delay and wiring delay are continuing, and even higher performance bipolar silicon devices will continue.<>