On-chip digital calibration for automatic input impedance boosting during biopotential measurements

An On-chip digital calibration system is presented to adaptively improve the input impedance of analog front-ends in biopotential measurement systems. The calibration unit controls two 8-bit capacitor banks to generate a negative capacitance and to significantly increase the input impedance of an instrumentation amplifier to above 500MΩ. An oscillation detection scheme protects the system from instability. Simulation results endorse that the calibration scheme is reliable in the presence of process variations. The calibration logic unit was designed, laid out and simulated in 130nm CMOS technology with a 1.2V supply. It consumes 1.2 μW of power and 0.062 mm2 of chip area.