复杂微处理器的可扩展混合验证

Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232) Pub Date : 2001-06-22 DOI:10.1145/378239.378265

M. Mneimneh, F. Aloul, Christopher T. Weaver, Saugata Chatterjee, K. Sakallah, T. Austin

{"title":"复杂微处理器的可扩展混合验证","authors":"M. Mneimneh, F. Aloul, Christopher T. Weaver, Saugata Chatterjee, K. Sakallah, T. Austin","doi":"10.1145/378239.378265","DOIUrl":null,"url":null,"abstract":"We introduce a new verification methodology for modern microprocessors that uses a simple checker processor to validate the execution of a companion high-performance processor. The checker can be viewed as an at-speed emulator that is formally verified to be compliant to an ISA specification. This verification approach enables the practical deployment of formal methods without impacting overall performance.","PeriodicalId":154316,"journal":{"name":"Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232)","volume":"136 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"24","resultStr":"{\"title\":\"Scalable hybrid verification of complex microprocessors\",\"authors\":\"M. Mneimneh, F. Aloul, Christopher T. Weaver, Saugata Chatterjee, K. Sakallah, T. Austin\",\"doi\":\"10.1145/378239.378265\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We introduce a new verification methodology for modern microprocessors that uses a simple checker processor to validate the execution of a companion high-performance processor. The checker can be viewed as an at-speed emulator that is formally verified to be compliant to an ISA specification. This verification approach enables the practical deployment of formal methods without impacting overall performance.\",\"PeriodicalId\":154316,\"journal\":{\"name\":\"Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232)\",\"volume\":\"136 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-06-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"24\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/378239.378265\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/378239.378265","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 24

摘要

我们为现代微处理器引入了一种新的验证方法，该方法使用简单的检查处理器来验证伴随的高性能处理器的执行。检查器可以看作是经过正式验证符合ISA规范的高速仿真器。这种验证方法支持正式方法的实际部署，而不会影响总体性能。

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Scalable hybrid verification of complex microprocessors

We introduce a new verification methodology for modern microprocessors that uses a simple checker processor to validate the execution of a companion high-performance processor. The checker can be viewed as an at-speed emulator that is formally verified to be compliant to an ISA specification. This verification approach enables the practical deployment of formal methods without impacting overall performance.

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来源期刊

Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232)

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