15gb /s Si双极判决电路的电路设计

K. Ishii, H. Ichino, Y. Kobayashi, C. Yamaguchi
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引用次数: 5

摘要

采用先进的超自对准硅双极工艺技术,采用0.5 μ m光刻技术,设计并制作了高比特率、高输入灵敏度的判决电路。为了同时实现高比特率和高输入灵敏度,不仅需要先进的器件技术,还需要复杂的电路设计,以从器件中提取最大的性能。电路设计包括优化单个晶体管的尺寸以提高速度,并采用宽带前置放大器来提高灵敏度。电路工作速度高达15gb /s,输入灵敏度为40mv /sub p-p/。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Circuit design for a 15-Gb/s Si bipolar decision circuit
The authors have designed and fabricated a high-bit-rate and high-input-sensitivity decision circuit using an advanced super-self-aligned Si bipolar process technology by 0.5- mu m photolithography. To realize both a very high bit rate and a high input sensitivity at the same time required not only advanced device technology but also a sophisticated circuit design to extract the maximum performance from the device. The circuit design included optimization of individual transistor sizes to boost the speed and adoption of a wideband preamplifier to enhance the sensitivity. The circuit operates at up to 15 Gb/s with an input sensitivity of 40 mV/sub p-p/.<>
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