CMOS中雷达应用的合并功率放大器和混频器电路拓扑

V. Issakov, M. Tiebout, H. Knapp, Yiqun Cao, W. Simbürger
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引用次数: 2

摘要

本文提出了一种将功率放大器和混频器功能合并在一个电路中的电路拓扑结构。在发射路径中放大的本振信号与接收到的射频信号同时用于混频操作,并应用于功率放大器的输出。功率放大器输出级的晶体管用于放大和无源混频。混频器的转换损耗可以最小化,同时不影响功率放大器的性能。该方法在0.13 μ m CMOS技术的合并功率放大器-混频器电路的测量中得到验证。混频器路径提供10 dB的转换损耗,而功率放大器实现板载输出功率为7 dBm。所提出的概念对于低成本大众市场应用的紧凑型集成单站雷达解决方案尤其有利。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Merged power amplifier and mixer circuit topology for radar applications in CMOS
This paper presents a circuit topology merging power amplifier and mixer functionalities in a single circuit. The amplified local oscillator signal in the transmitter path is used simultaneously for the mixing operation along with the received radio-frequency signal, applied to the output of the power amplifier. The transistors at the output stage of the power amplifier are used for both amplification and passive mixing. The conversion loss of the mixer can be minimized, whilst the performance of the power amplifier is not affected. This approach is verified in measurement of a merged power-amplifier-mixer circuit in 0.13 µm CMOS technology. The mixer path offers a conversion loss of 10 dB, whilst the power amplifier achieves on-board output power of 7 dBm. The presented concept can be particularly advantageous for compact integrated monostatic radar solutions for low-cost mass-market applications.
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