{"title":"一种低成本输入向量监测并行BIST方案","authors":"I. Voyiatzis, C. Efstathiou, C. Sgouropoulou","doi":"10.1109/IOLTS.2013.6604074","DOIUrl":null,"url":null,"abstract":"Input vector monitoring concurrent BIST schemes perform testing concurrently with the operation of the circuit. In this work a novel input vector monitoring concurrent BIST scheme is presented that compares favorably to previously proposed schemes with respect to the required hardware overhead.","PeriodicalId":423175,"journal":{"name":"2013 IEEE 19th International On-Line Testing Symposium (IOLTS)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-07-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A low-cost input vector monitoring concurrent BIST scheme\",\"authors\":\"I. Voyiatzis, C. Efstathiou, C. Sgouropoulou\",\"doi\":\"10.1109/IOLTS.2013.6604074\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Input vector monitoring concurrent BIST schemes perform testing concurrently with the operation of the circuit. In this work a novel input vector monitoring concurrent BIST scheme is presented that compares favorably to previously proposed schemes with respect to the required hardware overhead.\",\"PeriodicalId\":423175,\"journal\":{\"name\":\"2013 IEEE 19th International On-Line Testing Symposium (IOLTS)\",\"volume\":\"10 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-07-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE 19th International On-Line Testing Symposium (IOLTS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IOLTS.2013.6604074\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE 19th International On-Line Testing Symposium (IOLTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IOLTS.2013.6604074","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A low-cost input vector monitoring concurrent BIST scheme
Input vector monitoring concurrent BIST schemes perform testing concurrently with the operation of the circuit. In this work a novel input vector monitoring concurrent BIST scheme is presented that compares favorably to previously proposed schemes with respect to the required hardware overhead.