摩尔fsm的lut数量减少

2019 MIXDES - 26th International Conference "Mixed Design of Integrated Circuits and Systems" Pub Date : 2019-06-01 DOI:10.23919/MIXDES.2019.8787047

A. Barkalov, L. Titarenko, Kamil Mielcarek, K. Krzywicki, W. Zajac

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引用次数: 1

摘要

提出了一种基于fpga的摩尔fsm硬件缩减方法。该方法基于对FSM直接结构表行对应的项进行编码。给出了合成的实例。这种方法的应用可以减少FSM电路中lut的数量。

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Decreasing Number of LUTs for Moore FSMs

A method is proposed for hardware reduction in FPGA-based Moore FSMs. The method is based on encoding of the terms corresponding to rows of FSM direct structure table. The example of synthesis is given. The application of this method allows reducing the numbers of LUTs in FSM circuits.

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来源期刊

2019 MIXDES - 26th International Conference "Mixed Design of Integrated Circuits and Systems"

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