{"title":"基于NoC的mpsoc中链路带宽感知回溯的动态任务映射","authors":"Changlin Chen, S. Cotofana","doi":"10.1145/2685342.2685343","DOIUrl":null,"url":null,"abstract":"In Network-on-Chip (NoC) based Multi-Processor Systems-on-Chip (MPSoCs) links, when affected by various dependability factors, may experience bandwidth reduction, which could result in substantial performance penalties if not properly considered within the application mapping process. In this paper, we propose a run-time task mapping algorithm, which takes both the path traffic load and link bandwidth into the consideration and maps applications onto contiguous near convex regions to reduce the internal and external congestion. We rely on backtracking strategy to guaranty that the maximum link traffic load does not exceed a given limit determined by the link bandwidth and a loose factor. To evaluate our proposal we map synthetic (TGFF tool generated) and real video processing applications on partially defective 8×8 NoCs. The experiments indicate that our approach substantially outperforms equivalent state of the art task mapping heuristics when NoC defects are present, e.g., for 5% broken wires, we achieve at least 16% communication cost reduction and 45% shorter average packet transmission latency.","PeriodicalId":344147,"journal":{"name":"Network on Chip Architectures","volume":"60 8","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Link Bandwidth Aware Backtracking Based Dynamic Task Mapping in NoC based MPSoCs\",\"authors\":\"Changlin Chen, S. Cotofana\",\"doi\":\"10.1145/2685342.2685343\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In Network-on-Chip (NoC) based Multi-Processor Systems-on-Chip (MPSoCs) links, when affected by various dependability factors, may experience bandwidth reduction, which could result in substantial performance penalties if not properly considered within the application mapping process. In this paper, we propose a run-time task mapping algorithm, which takes both the path traffic load and link bandwidth into the consideration and maps applications onto contiguous near convex regions to reduce the internal and external congestion. We rely on backtracking strategy to guaranty that the maximum link traffic load does not exceed a given limit determined by the link bandwidth and a loose factor. To evaluate our proposal we map synthetic (TGFF tool generated) and real video processing applications on partially defective 8×8 NoCs. The experiments indicate that our approach substantially outperforms equivalent state of the art task mapping heuristics when NoC defects are present, e.g., for 5% broken wires, we achieve at least 16% communication cost reduction and 45% shorter average packet transmission latency.\",\"PeriodicalId\":344147,\"journal\":{\"name\":\"Network on Chip Architectures\",\"volume\":\"60 8\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-12-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Network on Chip Architectures\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/2685342.2685343\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Network on Chip Architectures","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/2685342.2685343","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Link Bandwidth Aware Backtracking Based Dynamic Task Mapping in NoC based MPSoCs
In Network-on-Chip (NoC) based Multi-Processor Systems-on-Chip (MPSoCs) links, when affected by various dependability factors, may experience bandwidth reduction, which could result in substantial performance penalties if not properly considered within the application mapping process. In this paper, we propose a run-time task mapping algorithm, which takes both the path traffic load and link bandwidth into the consideration and maps applications onto contiguous near convex regions to reduce the internal and external congestion. We rely on backtracking strategy to guaranty that the maximum link traffic load does not exceed a given limit determined by the link bandwidth and a loose factor. To evaluate our proposal we map synthetic (TGFF tool generated) and real video processing applications on partially defective 8×8 NoCs. The experiments indicate that our approach substantially outperforms equivalent state of the art task mapping heuristics when NoC defects are present, e.g., for 5% broken wires, we achieve at least 16% communication cost reduction and 45% shorter average packet transmission latency.