位串行数字滤波器的低功耗优化

Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334) Pub Date : 1997-09-07 DOI:10.1109/ASIC.1997.617011

P. Astrom, P. Nilsson, M. Torkelsson

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引用次数: 1

摘要

提出了一种针对高采样率和低功耗的全自定义固定系数位串行滤波器的优化方法。其思想是用长度系数交换过滤顺序。为了显示结果，设计并实现了两个滤波器，一个作为最小阶滤波器，另一个作为最小系数滤波器。测量表明，在一半的功耗下可以获得10倍的采样率增加。

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Low power optimization of bit-serial digital filters

A new approach to optimize full custom, fixed coefficient bit-serial filters aimed at high sample rate and low power consumption is presented. The idea is to trade the filter order with the coefficient length. To show the results two filters were designed and implemented, one as a minimum order filter and the other as a minimum coefficient filter. Measurements shows that a ten fold increase in sample rate can be obtained at half the power consumption.

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来源期刊

Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)

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