An on-chip automatic tuning circuit using integration level approximation technique

An on-chip automatic tuning circuit with proposed integration level approximation technique was designed in a 0.65 m 3.3 V CMOS process for tuning of the variation passive component. To verify the tuning efficiency of the proposed circuit, three types of 2nd-order biquad RC active filters were used. The cut-off frequency (f/sub c/) error of filter with the proposed tuning circuit can be reduced by a new algorithm that considers the variation of capacitor value in capacitor arrays as well as the variation of normal component. This circuit runs so fast that it can also be applied to real-time calibration. This tuning circuit with 4-bits resolution achieves -1.6%/spl sim/+1.5% cut-off-frequency error for /spl plusmn/56% RC variation.