T. Mori, K. Aono, H. Sakai, K. Hasegawa, H. Yamada, T. Takemoto
{"title":"微可编程实时图像处理器","authors":"T. Mori, K. Aono, H. Sakai, K. Hasegawa, H. Yamada, T. Takemoto","doi":"10.1109/ISSCC.1986.1157003","DOIUrl":null,"url":null,"abstract":"A micro-programmable realtime image processor with an instruction cycle of 20ns will be described. A 7×7mm2, 45K transistor chip has been designed in a self-aligned bipolar technology. Dissipation is 2.5W.","PeriodicalId":440688,"journal":{"name":"1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"10 2","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":"{\"title\":\"A micro-programmable realtime image processor\",\"authors\":\"T. Mori, K. Aono, H. Sakai, K. Hasegawa, H. Yamada, T. Takemoto\",\"doi\":\"10.1109/ISSCC.1986.1157003\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A micro-programmable realtime image processor with an instruction cycle of 20ns will be described. A 7×7mm2, 45K transistor chip has been designed in a self-aligned bipolar technology. Dissipation is 2.5W.\",\"PeriodicalId\":440688,\"journal\":{\"name\":\"1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"volume\":\"10 2\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"13\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.1986.1157003\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1986.1157003","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A micro-programmable realtime image processor with an instruction cycle of 20ns will be described. A 7×7mm2, 45K transistor chip has been designed in a self-aligned bipolar technology. Dissipation is 2.5W.