射频集成电路设计挑战

Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175) Pub Date : 1998-05-01 DOI:10.1145/277044.277154

B. Razavi

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引用次数: 26

摘要

本文描述了设计无线收发器应用的射频集成电路所面临的挑战。提出了外差、纯差和图像抑制拓扑等接收架构，并研究了两种发送架构，即一步和两步配置。建筑模块的设计:如低噪声放大器，混频器和振荡器也被考虑。

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RF IC design challenges

This paper describes the challenges in designing RF integrated circuits for wireless transceiver applications. Receiver architectures such as heterodyne, homodyne, and image-reject topologies are presented and two transmitter architectures, namely, one-step and two-step configurations are studied. The design of building blocks: such as low-noise amplifiers, mixers, and oscillators is also considered.

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Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175)

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