C. Schuckert, D. Murray, C. Roberts, G. Cheek, T. Goida
{"title":"聚酰亚胺应力缓冲集成电路技术","authors":"C. Schuckert, D. Murray, C. Roberts, G. Cheek, T. Goida","doi":"10.1109/ASMC.1990.111222","DOIUrl":null,"url":null,"abstract":"A photoimagable polyimide layer which has been evaluated as a stress relief buffer for use with integrated circuits (ICs) packaged in plastic is discussed. The wafer-level overcoat process is manufacturable using available spin coat and develop tracks and is compared to conventional post wirebond die overcoating. Some properties of the polyimide layer, the manufacturing process, and the results achieved on actual commercial products are reviewed.<<ETX>>","PeriodicalId":158760,"journal":{"name":"IEEE/SEMI Conference on Advanced Semiconductor Manufacturing Workshop","volume":"13 2","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Polyimide stress buffers in IC technology\",\"authors\":\"C. Schuckert, D. Murray, C. Roberts, G. Cheek, T. Goida\",\"doi\":\"10.1109/ASMC.1990.111222\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A photoimagable polyimide layer which has been evaluated as a stress relief buffer for use with integrated circuits (ICs) packaged in plastic is discussed. The wafer-level overcoat process is manufacturable using available spin coat and develop tracks and is compared to conventional post wirebond die overcoating. Some properties of the polyimide layer, the manufacturing process, and the results achieved on actual commercial products are reviewed.<<ETX>>\",\"PeriodicalId\":158760,\"journal\":{\"name\":\"IEEE/SEMI Conference on Advanced Semiconductor Manufacturing Workshop\",\"volume\":\"13 2\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-09-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE/SEMI Conference on Advanced Semiconductor Manufacturing Workshop\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASMC.1990.111222\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE/SEMI Conference on Advanced Semiconductor Manufacturing Workshop","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASMC.1990.111222","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A photoimagable polyimide layer which has been evaluated as a stress relief buffer for use with integrated circuits (ICs) packaged in plastic is discussed. The wafer-level overcoat process is manufacturable using available spin coat and develop tracks and is compared to conventional post wirebond die overcoating. Some properties of the polyimide layer, the manufacturing process, and the results achieved on actual commercial products are reviewed.<>
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