一种抗组合电路软误差和瞬态的稳健触发器结构

Aditya Jagirdar, Roystein Oliveira, T. Chakraborty
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引用次数: 4

摘要

在现场作业中,软错误是导致可靠性问题的主要原因。高能粒子,无论是来自宇宙射线还是来自包装材料中的杂质,都可能破坏存储在内部节点电容上的电荷,导致设备故障。虽然这通常是暂时的影响,但如果不及时发现,可能会导致静默数据损坏(SDC)。SDC可能对设备的许多实时商业应用有害,并且需要在各种设计开销方面便宜的有效解决方案。在本文中,我们提出了两种新颖的触发器设计,旨在检测和纠正组合电路的软误差和瞬态。每种设计都针对不同的约束条件进行了优化,与标准工业设计的扫描触发器相比,它们的面积开销分别为40%和21%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Robust Architecture for Flip-Flops Tolerant to Soft-Errors and Transients from Combinational Circuits
Soft-errors are a leading cause of reliability issues during field operations. High-energy particles, either from cosmic rays or from impurities in the packaging material can disrupt charge stored on the internal node capacitances leading to a malfunction of the device. Although this is usually a temporary effect, it may lead to Silent Data Corruption(SDC) when not detected in time. SDC may be detrimental to many real-time commercial applications of the device and demands an effective solution that is cheap in terms of various design overheads. In this paper, we propose two novel flip-flop designs aimed at detecting and correcting soft-errors and transients from combinational circuits.Each design is optimized for a different set of constraints and they have area overheads of 40% and 21% as compared to the standard industrial design of a scan flip- flop.
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