非均匀衬底温度对高性能设计中时钟信号完整性的影响

Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169) Pub Date : 2001-05-06 DOI:10.1109/CICC.2001.929762

A. Ajami, Massoud Pedram, K. Banerjee

{"title":"非均匀衬底温度对高性能设计中时钟信号完整性的影响","authors":"A. Ajami, Massoud Pedram, K. Banerjee","doi":"10.1109/CICC.2001.929762","DOIUrl":null,"url":null,"abstract":"This paper presents the analysis and modeling of the nonuniform substrate temperature in high performance ICs and its effect on the integrity of the clock signal. Using a novel non-uniform temperature-dependent distributed RC interconnect delay model, the behavior of clock skew in the presence of the substrate thermal gradients is analyzed and some design guidelines are provided to ensure the integrity of the clock signal.","PeriodicalId":101717,"journal":{"name":"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)","volume":"66 ","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"47","resultStr":"{\"title\":\"Effects of non-uniform substrate temperature on the clock signal integrity in high performance designs\",\"authors\":\"A. Ajami, Massoud Pedram, K. Banerjee\",\"doi\":\"10.1109/CICC.2001.929762\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the analysis and modeling of the nonuniform substrate temperature in high performance ICs and its effect on the integrity of the clock signal. Using a novel non-uniform temperature-dependent distributed RC interconnect delay model, the behavior of clock skew in the presence of the substrate thermal gradients is analyzed and some design guidelines are provided to ensure the integrity of the clock signal.\",\"PeriodicalId\":101717,\"journal\":{\"name\":\"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)\",\"volume\":\"66 \",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-05-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"47\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.2001.929762\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2001.929762","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 47

摘要

本文对高性能集成电路中衬底温度的不均匀性及其对时钟信号完整性的影响进行了分析和建模。利用一种新颖的非均匀温度相关分布式RC互连延迟模型，分析了衬底热梯度存在时时钟偏差的行为，并提供了一些保证时钟信号完整性的设计准则。

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Effects of non-uniform substrate temperature on the clock signal integrity in high performance designs

This paper presents the analysis and modeling of the nonuniform substrate temperature in high performance ICs and its effect on the integrity of the clock signal. Using a novel non-uniform temperature-dependent distributed RC interconnect delay model, the behavior of clock skew in the presence of the substrate thermal gradients is analyzed and some design guidelines are provided to ensure the integrity of the clock signal.

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Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)

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