{"title":"GENVIEW:用于宏单元生成器的便携式源代码级调试器","authors":"A. Compan, A. Greiner, F. Pêcheux, F. Pétrot","doi":"10.1109/EDAC.1991.206436","DOIUrl":null,"url":null,"abstract":"An effective layout design method for VLSI macrocell is presented. The method describes a way to write, to test and to validate efficient full-custom generators and tilers. First, after a brief overview of the design methodology of tilers, the GENLIB C-library of procedural design functions is described. Second, GENVIEW, a portable and graphic layout debugger for the interactive testing of generators, is detailed.<<ETX>>","PeriodicalId":425087,"journal":{"name":"Proceedings of the European Conference on Design Automation.","volume":"124 ","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-02-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"GENVIEW: a portable source-level debugger for macrocell generators\",\"authors\":\"A. Compan, A. Greiner, F. Pêcheux, F. Pétrot\",\"doi\":\"10.1109/EDAC.1991.206436\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An effective layout design method for VLSI macrocell is presented. The method describes a way to write, to test and to validate efficient full-custom generators and tilers. First, after a brief overview of the design methodology of tilers, the GENLIB C-library of procedural design functions is described. Second, GENVIEW, a portable and graphic layout debugger for the interactive testing of generators, is detailed.<<ETX>>\",\"PeriodicalId\":425087,\"journal\":{\"name\":\"Proceedings of the European Conference on Design Automation.\",\"volume\":\"124 \",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-02-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the European Conference on Design Automation.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDAC.1991.206436\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the European Conference on Design Automation.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDAC.1991.206436","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
GENVIEW: a portable source-level debugger for macrocell generators
An effective layout design method for VLSI macrocell is presented. The method describes a way to write, to test and to validate efficient full-custom generators and tilers. First, after a brief overview of the design methodology of tilers, the GENLIB C-library of procedural design functions is described. Second, GENVIEW, a portable and graphic layout debugger for the interactive testing of generators, is detailed.<>