P. Gupta, D. Burman, J. Das, M. Brahma, H. Rahaman, P. Dasgupta
{"title":"模拟全耗尽双栅无结场效应管的通道电位和阈值电压","authors":"P. Gupta, D. Burman, J. Das, M. Brahma, H. Rahaman, P. Dasgupta","doi":"10.1109/CODIS.2012.6422158","DOIUrl":null,"url":null,"abstract":"An analytical model for the 2D potential distribution in sub-threshold regime of operation of a Double Gate Junctionless FET (DG-JL FET) structure is developed. Threshold voltage is computed by computing the minimum value of channel potential. The model predicts the threshold voltage of the device with reasonable accuracy.","PeriodicalId":274831,"journal":{"name":"2012 International Conference on Communications, Devices and Intelligent Systems (CODIS)","volume":"47 3","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Modeling the channel potential and threshold voltage of a fully depleted Double Gate Junctionless FET\",\"authors\":\"P. Gupta, D. Burman, J. Das, M. Brahma, H. Rahaman, P. Dasgupta\",\"doi\":\"10.1109/CODIS.2012.6422158\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An analytical model for the 2D potential distribution in sub-threshold regime of operation of a Double Gate Junctionless FET (DG-JL FET) structure is developed. Threshold voltage is computed by computing the minimum value of channel potential. The model predicts the threshold voltage of the device with reasonable accuracy.\",\"PeriodicalId\":274831,\"journal\":{\"name\":\"2012 International Conference on Communications, Devices and Intelligent Systems (CODIS)\",\"volume\":\"47 3\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 International Conference on Communications, Devices and Intelligent Systems (CODIS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CODIS.2012.6422158\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 International Conference on Communications, Devices and Intelligent Systems (CODIS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CODIS.2012.6422158","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Modeling the channel potential and threshold voltage of a fully depleted Double Gate Junctionless FET
An analytical model for the 2D potential distribution in sub-threshold regime of operation of a Double Gate Junctionless FET (DG-JL FET) structure is developed. Threshold voltage is computed by computing the minimum value of channel potential. The model predicts the threshold voltage of the device with reasonable accuracy.