Hot topic session 4A: Reliability analysis of complex digital systems

Today, there are several trends that are making the reliability analysis of complex integrated circuits an important challenge in industry. As transistor geometries shrink, the number of physical failure mechanisms is increasing while at the same time the number of transistors per chip is still growing. The rollout of new services is pushing compute demands both in handheld devices and in the data center which is driving up complexity and the level of integration. People are becoming critically dependent on mobile services and expect high availability. Looking forward to the deployment of the Internet of Things (IoT) where processors and routers will be embedded in billions of end-points, we are only going to see an increased demand for reliable computing. In this session, we bring together three different industrial perspectives on reliability. The first looks at the end-points, the second looks at the servers and the last looks at the economic drivers for reliability and the demand for new EDA tools for reliability analysis. In the first talk, Rob Aitken from ARM will discuss the reliability challenges in mobile applications. As mobile systems continue to increase in size and complexity, and user requirements are also becoming more stringent, it is important for designers of mobile systems to be aware of reliability issues, and to adapt their methodologies accordingly. This talk discusses the issues involved, from latent defects, through soft errors, aging and wearout, and shows how to consider these as part of the design process, how to quantify their effects, and how to mitigate them through design changes. In the second presentation, Burcin Aktan from Intel is going to discuss the evolution of the reliability features that are found in server applications. With so many processing units packed in data centers the reliability requirements on an individual device is growing, especially with integrated memory controllers and very high bandwidth data pathways. What was an “add-on” to a device function, 10–15 years ago, now needs to be considered carefully with stringent budgets distributed to each functional block that contribute to overall error rates. This talk will focus on the evolution of reliability features in a number of server products leading into the current state and look at how today's designers are dealing with the challenges of gathering requirements, translating these to design implementation and delivering quality features to customers. Finally we will close with remarks on future directions and possible research areas. In the final presentation, Olivier Lauzeral from iROC Technologies will discuss the importance of methodologies for the reliability analysis of complex SoCs. There is an inherent cost to adding reliability features in a complex IC and designers need to be able to make informed decisions about how much hardware to allocate for mitigation (redundancy, error correction, repair). A prerequisite to make such choices is clearly defined targets and this requires an economic framework where the cost of failures is understood. Once the reliability targets for a system and individual devices are established, there is a need for EDA tools which allow designers to compute the failure rate and failure modes within the device. This analysis must include all failure mechanisms (radiation effects, lifetime effects, manufacturing detects) and take into account the relevant de-ratings between faults and observed errors. This new EDA infra-structure is key for designers to make effective trade-offs in order to arrive at a cost effective design.