Coupled Si and SiO/sub 2/ Monte Carlo device simulator for accurate gate current calculation

Abstract

A new MOSFET device simulator has been developed based on a coupled Monte Carlo procedure for the carrier transport in both Si and SiO/sub 2/ regions. This simulator accounts for the image force effect that modulates potential barrier height for the electrons injected into the SiO/sub 2/. Gate currents are calculated combining both the hot carrier injection and the back-scattering from the SiO/sub 2/ region arising from the potential modulation. Flash memory cell simulations were performed by this method. The actual MOSFET gate currents and the programming characteristics of the flash memory cells could be reproduced quantitatively without using any adjustable parameters.