Reconfiguration of degradable VLSI/WSI arrays under the constraint of row bypass and column rerouting

Abstract

This paper examine the problem of reconfiguring two dimensional VLSI/WSI arrays via the degradation approach. In this approach, all elements are treated uniformly and no elements are dedicated as spares. The goal is to derive a fault-free subarray T from the defective host array such that the dimensions of T are larger than some specified minimum. This problem is known to be NP-complete under the constraint of row bypass and column rerouting. However, we show that a special case of the reconfiguration problem is optimally solvable in linear time. Using this result, a new fast and efficient reconfiguration algorithm is proposed for the general problem. Empirical study shows that the new algorithm indeed produce good results in terms of the percentages of harvest and degradation of VLSI/WSI arrays.