Design trends and challenges for parallel optical interconnect

A. Armstrong, S. Killmeyerz, J. Yee, G. Uscategui, R. Deming, Taewon Jung, R. Heilman, H. Patterson, Y. Ro, D. Myers, L. Mack, Xiaofang Mug
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引用次数: 4

Abstract

A 12-channel 3.125 Gb/s VCSEL driver IC has been designed in a SiGe BiCMOS process technology. The IC consists of 12 VCSEL drivers, a set of DACs providing per-channel adjustment of modulation and bias currents, peaking depth and width, and overcurrent threshold, and a three-wire serial interface which allows access to the DACs as well as internal registers for eye safety shutdown and other functions. The driver IC addresses many of the manufacturing issues in very short reach (VSR) parallel optical modules.
并行光互连的设计趋势与挑战
采用SiGe BiCMOS工艺设计了一个12通道3.125 Gb/s VCSEL驱动IC。该IC包括12个VCSEL驱动器,一组dac,提供调制和偏置电流的单通道调节,峰值深度和宽度,以及过流阈值,以及一个三线串行接口,允许访问dac以及用于眼睛安全关闭和其他功能的内部寄存器。驱动IC解决了极短距离(VSR)并行光模块中的许多制造问题。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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