Kihyun Choi, T. Jeong, Jinju Kim, S. Choo, Young-Hoon Kim, M. Yeo, Miji Lee, Jinseok Kim, Euncheol Lee
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引用次数: 1
Abstract
In this paper, we will report the reliability characterization of advanced FinFET technology which is developed by utilizing EUV. The intrinsic device reliability including HCI, BTI, and TDDB is comparable across FinFET technologies, and would not be degraded by scaling down. The use of EUV single patterning significantly improves reliability variation so that improved reliability lifetime compared to the use of ArF multi-patterning. Also, the fact that long-term reliability results support lifetime projection of TDDB follows power model, enables us to utilize more reliability margins in the scaled FinFET technologies.